1. Field of the Invention
The present invention relates to a MOS type field effect transistor having a high source-drain breakdown voltage.
2. Description of the Prior Art
A conventional MOS type field effect transistor consists of source and drain diffusion regions disposed in a surface portion of a semiconductor substrate, an insulating layer formed on the surface of the semiconductor substrate outside the region where the MOS type field effect transistor is formed, a gate oxide layer covering the surface of the semiconductor substrate between the source and the drain diffusion regions, a gate electrode disposed on the gate oxide layer, a source electrode and a drain electrode. The drain breakdown voltage is one of the most important characteristics of the MOS type field effect transistor, because it determines the power supply voltage for the entire circuit. For a conventional MOS type field effect transistor described above, ordinarily, the breakdown voltage between the drain and the source is about one half of that between the drain and the semiconductor substrate. Further, both characteristics vary with variations in the gate voltage. It is presumed that this is due to the fact that the source, the semiconductor substrate and the drain constitute a parasitic npn lateral bipolar transistor, in which they are the emitter, the base, and the collector, respectively, if the MOS type field effect transistor is of n channel type. Under normal working conditions, the collector junction of this parasitic transistor is reverse-biased. When the reverse-bias applied to the collector junction increases, electrons present in the base are accelerated by a strong electric field at the collector junction, and it turns out that electron-hole pairs are generated in the base before breakdown by electron avalanche at the collector junction. From these electron-hole pairs, electrons are immediately absorbed by the collector which is at a positive potential. But, since holes are not absorbed by the collector, if the base is open, i.e., if the base potential is not well determined, the holes increase the base potential near the emitter, which finally results in electron injection from the emitter to the base. The majority of these injected electrons reach the collector junction through the base just as in ordinary transistors, accelerated by the strong electric field at the collector junction, and rush to the collector. That is, the abrupt increase of the reverse current, i.e., breakdown at the collector junction is provoked by holes of electron-hole pairs generated in the base before real breakdown due to electron avalanche. In simple diode junctions, which are not transistors, the abrupt increase of the reverse current does not occur until electron avalanche is produced. It is well known that, denoting the breakdown voltage between the collector and the emitter of a transistor by BV.sub.CE, the breakdown voltage between the collector and the base by BV.sub.CB, and the current amplification factor of the transistor by h.sub.FE, when the base is open, BV.sub.CE can be represented by the following relation: EQU BV.sub.CE .apprxeq. BV.sub.CB /.sqroot.h.sub.FE ( 1)
since the base resistance between an electrode disposed on the rear surface of the semiconductor substrate giving a substrate bias voltage to the transistor and the drain of the MOS type field effect transistor, described previously, is as high as about 3k.OMEGA., the base of the parasitic lateral transistor mentioned above can be nearly considered to be in a base open state. Consequently, the formula (1) can be applied to a parasitic lateral transistor, whose emitter, base, and collector are the source, the substrate, and the drain, respectively, and transformed to EQU BV.sub.DS .apprxeq. BVj/.sqroot.h.sub.FE ( 2)
where BVj and BV.sub.DS represent the source-drain breakdown voltage and the drain-substrate breakdown voltage of the MOS type field effect transistor, respectively. This is the reason why BV.sub.DS is much smaller than BVj for conventional MOS type field effect transistors for the gate voltages above a certain value, for which h.sub.FE is substantially greater than unity.